Uday Shah

Uday is a patent engineer with the firm and holds a J.D from Lewis and Clark Law School.

Prior to joining Mughal IP, Uday worked as a plasma etch engineer and as an integration engineer in Components Research at Intel Corporation for over 14 years. While at components research, Uday focused on developing novel plasma etch solutions for a wide variety of programs in the areas of transistors (Hi-K metal gate, Tri-Gate, silicon nanowire, III-V and Ge), memory (E-DRAM, Magnetic Tunnel Junction, Floating Body Cell), EUV lithography and directed self-assembly. Uday's integration work focused on developing novel memory devices (Magnetic Tunnel Junction and Resistive Random Access Memory).

Uday holds a PhD in engineering science from Rensselaer Polytechnic Institute, Troy, New York, with a focus on high temperature plasma diagnostics.

Uday holds over 100 US Patents in the areas of Hi-K metal gate transistors, TriGate transistors, Germanium transistors, III-V transistors, nanowire transistors, optical interconnects, EDRAM memory, magnetic memory, resistive random access memory (RRAM) and floating body cell memory.

Uday was awarded an Intel Achievement Award for Tri-Gate Transistor Innovation (Highest Technical Award at Intel), and nine Divisional awards for contributions to Planar/Non-Planar Transistor and Memory research. Uday was also recognized at the Smithsonian Museum's American Enterprise Exhibit for Intel's Tri-Gate Innovation (July 2015).